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 Freescale Semiconductor Technical Data
Document Number: MRF6V14300H Rev. 2, 11/2008
RF Power Field Effect Transistors
N - Channel Enhancement - Mode Lateral MOSFETs
RF Power transistors designed for applications operating at frequencies between 1200 and 1400 MHz, 1% to 12% duty cycle. These devices are suitable for use in pulsed applications. * Typical Pulsed Performance: VDD = 50 Volts, IDQ = 150 mA, Pout = 330 Watts Peak (39.6 W Avg.), f = 1400 MHz, Pulse Width = 300 sec, Duty Cycle = 12% Power Gain -- 18 dB Drain Efficiency -- 60.5% * Capable of Handling 5:1 VSWR, @ 50 Vdc, 1400 MHz, 330 Watts Peak Power Features * Characterized with Series Equivalent Large - Signal Impedance Parameters * Internally Matched for Ease of Use * Qualified Up to a Maximum of 50 VDD Operation * Integrated ESD Protection * Greater Negative Gate - Source Voltage Range for Improved Class C Operation * RoHS Compliant * In Tape and Reel. R3 Suffix = 250 Units per 56 mm, 13 inch Reel.
MRF6V14300HR3 MRF6V14300HSR3
1400 MHz, 330 W, 50 V PULSED LATERAL N - CHANNEL RF POWER MOSFETs
CASE 465 - 06, STYLE 1 NI - 780 MRF6V14300HR3
CASE 465A - 06, STYLE 1 NI - 780S MRF6V14300HSR3
Table 1. Maximum Ratings
Rating Drain- Source Voltage Gate- Source Voltage Storage Temperature Range Case Operating Temperature Operating Junction Temperature Symbol VDSS VGS Tstg TC TJ Value - 0.5, +100 - 6.0, +10 - 65 to +150 150 200 Unit Vdc Vdc C C C
Table 2. Thermal Characteristics
Characteristic Thermal Resistance, Junction to Case Case Temperature 65C, 330 W Pulsed, 300 sec Pulse Width, 12% Duty Cycle Symbol RJC Value (1,2) 0.13 Unit C/W
1. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1955.
(c) Freescale Semiconductor, Inc., 2008. All rights reserved.
MRF6V14300HR3 MRF6V14300HSR3 1
RF Device Data Freescale Semiconductor
Table 3. ESD Protection Characteristics
Test Methodology Human Body Model (per JESD22 - A114) Machine Model (per EIA/JESD22 - A115) Charge Device Model (per JESD22 - C101) Class 1C (Minimum) A (Minimum) IV (Minimum)
Table 4. Electrical Characteristics (TC = 25C unless otherwise noted)
Characteristic Off Characteristics Gate- Source Leakage Current (VGS = 5 Vdc, VDS = 0 Vdc) Drain- Source Breakdown Voltage (VGS = 0 Vdc, ID = 100 mA) Zero Gate Voltage Drain Leakage Current (VDS = 50 Vdc, VGS = 0 Vdc) Zero Gate Voltage Drain Leakage Current (VDS = 90 Vdc, VGS = 0 Vdc) On Characteristics Gate Threshold Voltage (VDS = 10 Vdc, ID = 662 Adc) Gate Quiescent Voltage (VDD = 50 Vdc, ID = 150 mAdc, Measured in Functional Test) Drain- Source On - Voltage (VGS = 10 Vdc, ID = 1.63 Adc) Dynamic Characteristics (1) Reverse Transfer Capacitance (VDS = 50 Vdc 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Output Capacitance (VDS = 50 Vdc 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc) Input Capacitance (VDS = 50 Vdc, VGS = 0 Vdc 30 mV(rms)ac @ 1 MHz) Crss Coss Ciss -- -- -- 0.6 350 330 -- -- -- pF pF pF VGS(th) VGS(Q) VDS(on) 0.9 1.5 -- 1.6 2.4 0.26 2.4 3 -- Vdc Vdc Vdc IGSS V(BR)DSS IDSS IDSS -- 100 -- -- -- -- -- -- 10 -- 50 2.5 Adc Vdc Adc mA Symbol Min Typ Max Unit
Functional Tests (In Freescale Test Fixture, 50 ohm system) VDD = 50 Vdc, IDQ = 150 mA, Pout = 330 W Peak (39.6 W Avg.), f = 1400 MHz, Pulsed, 300 sec Pulse Width, 12% Duty Cycle Power Gain Drain Efficiency Input Return Loss Gps D IRL 16.5 59(2) -- 18 60.5(2) - 12 19.5 -- -9 dB % dB
Pulsed RF Performance (In Freescale Application Test Fixture, 50 ohm system) VDD = 50 Vdc, IDQ = 150 mA, Pout = 330 W Peak (39.6 W Avg.), f1 = 1200 MHz, f2 = 1300 MHz and f3 = 1400 MHz, Pulsed, 300 sec Pulse Width, 12% Duty Cycle, tr = 50 ns Relative Insertion Phase Gain Flatness Pulse Amplitude Droop Harmonic 2nd and 3rd Spurious Response Load Mismatch Stability (VSWR = 3:1 at all Phase Angles) Load Mismatch Tolerance (VSWR = 5:1 at all Phase Angles) VSWR - S VSWR - T || GF Drp H2 & H3 -- -- -- -- -- 10 0.5 0.3 - 20 - 65 -- -- -- -- -- dB dB dBc dBc
All Spurs Below - 60 dBc No Degradation in Output Power
1. Part internally matched both on input and output. 2. Drain efficiency is calculated by: h + 100 P out where: Ipeak = (IAVG - IDQ) / Duty Cycle (%) + IDQ. D V DD I peak
MRF6V14300HR3 MRF6V14300HSR3 2 RF Device Data Freescale Semiconductor
+ C3 VBIAS + C9 RF INPUT C8 Z22 Z13 Z1 C1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 Z9 Z10 Z11 Z12 Z14 Z15 Z16 Z17 R1 C4 Z23 C5 C6
+ C7
VSUPPLY
Z18
Z19 Z20 C2
Z21
RF OUTPUT
DUT
Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 Z9 Z10 Z11 Z12
0.205 x 0.080 Microstrip 0.721 x 0.022 Microstrip 0.080 x 0.104 Microstrip 0.128 x 0.022 Microstrip 0.062 x 0.134 Microstrip 0.440 x 0.022 Microstrip 0.262 x 0.496 Microstrip 0.030 x 0.138 Microstrip 0.256 x 0.028 Microstrip 0.058 x 0.254 Microstrip 0.344 x 0.087 Microstrip 0.110 x 0.087 Microstrip
Z13 Z14 Z15 Z16 Z17 Z18 Z19 Z20 Z21 Z22 Z23 PCB
0.110 x 0.866 Microstrip 0.630 x 0.866 Microstrip 0.307 x 0.470 Microstrip 0.045 x 0.221 Microstrip 0.171 x 0.136 Microstrip 0.120 x 0.430 Microstrip 0.964 x 0.136 Microstrip 0.177 x 0.078 Microstrip 0.215 x 0.078 Microstrip 1.577 x 0.070 Microstrip 1.459 x 0.070 Microstrip Arlon CuClad 250GX - 0300- 55- 22, 0.030, r = 2.55
Figure 1. MRF6V14300HR3(HSR3) Test Circuit Schematic
Table 5. MRF6V14300HR3(HSR3) Test Circuit Component Designations and Values
Part C1 C2 C3 C4 C5 C6 C7 C8 C9 R1 Description 43 pF Chip Capacitor 18 pF Chip Capacitor 33 pF Chip Capacitor 27 pF Chip Capacitor 2.2 F, 100 V Chip Capacitor 470 F, 63 V Electrolytic Capacitor 330 pF, 63 V Electrolytic Capacitor 0.1 F, 35 V Chip Capacitor 10 F, 35 V Tantalum Capacitor 10 , 1/4 W Chip Resistor Part Number ATC100B430JT500XT ATC100B180JT500XT ATC100B330JT500XT ATC100B270JT500XT 2225X7R225KT3AB EMVY630GTR471MMH0S EMVY630GTR331MMH0S CDR33BX104AKYS T491D106K035AT CRCW120610R0FKEA Manufacturer ATC ATC ATC ATC ATC Multicomp Multicomp Kemet Kemet Vishay
MRF6V14300HR3 MRF6V14300HSR3 RF Device Data Freescale Semiconductor 3
C9
C4
C3
C5
C6
C8
R1 C7
C1 CUT OUT AREA
C2
MRF6V14300 Rev. 1
Figure 2. MRF6V14300HR3(HSR3) Test Circuit Component Layout
MRF6V14300HR3 MRF6V14300HSR3 4 RF Device Data Freescale Semiconductor
TYPICAL CHARACTERISTICS
1000 Coss Ciss C, CAPACITANCE (pF) 100 Measured with 30 mV(rms)ac @ 1 MHz VGS = 0 Vdc MAXIMUM OPERATING Tcase (C) 140 120 100 80 60 40 20 0 0 10 20 30 40 50 0 2 4 6 8 10 12 14 16 18 20 VDS, DRAIN-SOURCE VOLTAGE (VOLTS) DUTY CYCLE (%) VDD = 50 Vdc, IDQ = 150 mA f = 1200 MHz, Pulse Width = 300 sec Pout = 330 W Pout = 270 W Pout = 300 W 160
10 Crss
1
0.1
Figure 3. Capacitance versus Drain - Source Voltage
24 65 59 58 57 D, DRAIN EFFICIENCY (%) Gps, POWER GAIN (dB) 22 Gps 20 D 18 VDD = 50 Vdc, IDQ = 150 mA, f = 1400 MHz Pulse Width = 300 sec, Duty Cycle = 12% 16 50 100 Pout, OUTPUT POWER (WATTS) PULSED 25 400 35 45 Pout, OUTPUT POWER (dBm) 55 56 55 54 53 52 51 50 49 48 47 27
Figure 4. Safe Operating Area
P3dB = 55.30 dBm (339 W) P1dB = 54.77 dBm (300 W)
Ideal
Actual
VDD = 50 Vdc, IDQ = 150 mA, f = 1400 MHz Pulse Width = 300 sec, Duty Cycle = 12% 29 31 33 35 37 39
Pin, INPUT POWER (dBm) PULSED
Figure 5. Pulsed Power Gain and Drain Efficiency versus Output Power
22 IDQ = 600 mA Gps, POWER GAIN (dB) 22 21 20 19 18 17 16
Figure 6. Pulsed Output Power versus Input Power
21 Gps, POWER GAIN (dB)
IDQ = 150 mA, f = 1400 MHz Pulse Width = 300 sec Duty Cycle = 12%
20 300 mA 150 mA 19 450 mA
18 VDD = 50 Vdc, f = 1400 MHz Pulse Width = 300 sec, Duty Cycle = 12% 17 50 100 Pout, OUTPUT POWER (WATTS) PULSED 400 VDD = 30 V 15 50 100
35 V
40 V
45 V 50 V
400
Pout, OUTPUT POWER (WATTS) PULSED
Figure 7. Pulsed Power Gain versus Output Power
Figure 8. Pulsed Power Gain versus Output Power
MRF6V14300HR3 MRF6V14300HSR3 RF Device Data Freescale Semiconductor 5
TYPICAL CHARACTERISTICS
400 Pout, OUTPUT POWER (WATTS) PULSED TC = -30_C 25_C 85_C Gps, POWER GAIN (dB) 300 22 TC = -30_C 20 25_C D 34 VDD = 50 Vdc, IDQ = 150 mA, f = 1400 MHz Pulse Width = 300 sec, Duty Cycle = 12% 6 16 50 100 Pout, OUTPUT POWER (WATTS) PULSED 22 400 46 55_C Gps 24 25_C 55_C -30_C 70
85_C
58
200
85_C 18
100 VDD = 50 Vdc, IDQ = 150 mA, f = 1400 MHz Pulse Width = 300 sec, Duty Cycle = 12% 0 0 1 2 3 4 5 Pin, INPUT POWER (WATTS) PULSED
Figure 9. Pulsed Output Power versus Input Power
19 18 17 Gps, POWER GAIN (dB) 16 15 14 13 12 11 10 9 1200 IRL D Gps
Figure 10. Pulsed Power Gain and Drain Efficiency versus Output Power
63 62 61 60 59 0 -5 -10 -15 D, DRAIN EFFICIENCY (%)
VDD = 50 Vdc, IDQ = 150 mA, Pout = 330 W Peak (39.6 W Avg.) Pulse Width = 300 sec, Duty Cycle = 12% 1225 1250 1275 1300 1325 1350 1375
-20 -25 1400
f, FREQUENCY (MHz)
Figure 11. Broadband Performance @ Pout = 330 Watts Peak
108
MTTF (HOURS)
107
106
105 90 110 130 150 170 190 210 230 250 TJ, JUNCTION TEMPERATURE (C) This above graph displays calculated MTTF in hours when the device is operated at VDD = 50 Vdc, Pout = 330 W Peak, Pulse Width = 300 sec, Duty Cycle = 12%, and D = 60.5%. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product.
Figure 12. MTTF versus Junction Temperature MRF6V14300HR3 MRF6V14300HSR3 6 RF Device Data Freescale Semiconductor
IRL, INPUT RETURN LOSS (dB)
D, DRAIN EFFICIENCY (%)
Zo = 10
f = 1400 MHz Zload
f = 1400 MHz
f = 1200 MHz
Zsource
f = 1200 MHz
VDD = 50 Vdc, IDQ = 150 mA, Pout = 330 W Peak f MHz 1200 1300 1400 Zsource W 2.70 - j4.10 4.93 - j2.66 7.01 - j2.87 Zload W 2.97 - j2.66 2.85 - j2.40 3.17 - j1.78
Zsource = Test circuit impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Output Matching Network
Input Matching Network
Device Under Test
Z
source
Z
load
Figure 13. Series Equivalent Source and Load Impedance
MRF6V14300HR3 MRF6V14300HSR3 RF Device Data Freescale Semiconductor 7
PACKAGE DIMENSIONS
B G
1
2X
Q bbb
M
TA
M
B
M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1994. 2. CONTROLLING DIMENSION: INCH. 3. DELETED 4. DIMENSION H IS MEASURED 0.030 (0.762) AWAY FROM PACKAGE BODY. DIM A B C D E F G H K M N Q R S aaa bbb ccc INCHES MIN MAX 1.335 1.345 0.380 0.390 0.125 0.170 0.495 0.505 0.035 0.045 0.003 0.006 1.100 BSC 0.057 0.067 0.170 0.210 0.774 0.786 0.772 0.788 .118 .138 0.365 0.375 0.365 0.375 0.005 REF 0.010 REF 0.015 REF MILLIMETERS MIN MAX 33.91 34.16 9.65 9.91 3.18 4.32 12.57 12.83 0.89 1.14 0.08 0.15 27.94 BSC 1.45 1.70 4.32 5.33 19.66 19.96 19.60 20.00 3.00 3.51 9.27 9.53 9.27 9.52 0.127 REF 0.254 REF 0.381 REF
3 (FLANGE)
B
2
K
D bbb
M
TA
M
B
M
M
(INSULATOR)
R
M
(LID)
bbb N H
(LID)
M
TA
B
M
ccc
M
TA
M
B
M
S
M
(INSULATOR)
ccc C
TA
M
B
M
aaa
M
TA
M
B
M
F E A
(FLANGE)
A
T
SEATING PLANE
CASE 465 - 06 ISSUE G NI - 780 MRF6V14300HR3
STYLE 1: PIN 1. DRAIN 2. GATE 3. SOURCE
4X U (FLANGE)
B
1
4X Z (LID)
(FLANGE)
B
2
2X
K
D bbb
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1994. 2. CONTROLLING DIMENSION: INCH. 3. DELETED 4. DIMENSION H IS MEASURED 0.030 (0.762) AWAY FROM PACKAGE BODY. DIM A B C D E F H K M N R S U Z aaa bbb ccc INCHES MIN MAX 0.805 0.815 0.380 0.390 0.125 0.170 0.495 0.505 0.035 0.045 0.003 0.006 0.057 0.067 0.170 0.210 0.774 0.786 0.772 0.788 0.365 0.375 0.365 0.375 --- 0.040 --- 0.030 0.005 REF 0.010 REF 0.015 REF MILLIMETERS MIN MAX 20.45 20.70 9.65 9.91 3.18 4.32 12.57 12.83 0.89 1.14 0.08 0.15 1.45 1.70 4.32 5.33 19.61 20.02 19.61 20.02 9.27 9.53 9.27 9.52 --- 1.02 --- 0.76 0.127 REF 0.254 REF 0.381 REF
TA
M
B
M
N
(LID)
R
M
(LID)
ccc M H
3
TA
M
B
M
ccc aaa
M
TA TA
M
B B
M
(INSULATOR)
S
M
(INSULATOR) M
bbb C
M
TA
B
M
M
M
F T
SEATING PLANE
E A
(FLANGE)
A
CASE 465A - 06 ISSUE H NI - 780S MRF6V14300HSR3
STYLE 1: PIN 1. DRAIN 2. GATE 5. SOURCE
MRF6V14300HR3 MRF6V14300HSR3 8 RF Device Data Freescale Semiconductor
PRODUCT DOCUMENTATION
Refer to the following documents to aid your design process. Application Notes * AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins * EB212: Using Data Sheet Impedances for RF LDMOS Devices
REVISION HISTORY
The following table summarizes revisions to this document.
Revision 0 1 Date Sept. 2008 Oct. 2008 * Initial Release of Data Sheet * Added footnote to describe the formula used to calculate values for Min and Typ Drain Efficiency in the Functional Test table, p. 2 * Updated Fig. 4, Safe Operating Area, to show additional curves for 270 W and 300 W output power, p. 5 * Added Fig. 12, MTTF versus Junction Temperature, p. 6 2 Nov. 2008 * Changed "multiply by" symbol to "divide by" symbol in the Functional Test Drain Efficiency formula footnote, p. 2 Description
MRF6V14300HR3 MRF6V14300HSR3 RF Device Data Freescale Semiconductor 9
How to Reach Us:
Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor, Inc. Technical Information Center, EL516 2100 East Elliot Road Tempe, Arizona 85284 1 - 800- 521- 6274 or +1 - 480- 768- 2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) www.freescale.com/support Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1 - 8 - 1, Shimo - Meguro, Meguro - ku, Tokyo 153 - 0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor China Ltd. Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing 100022 China +86 10 5879 8000 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1 - 800- 441- 2447 or +1 - 303- 675- 2140 Fax: +1 - 303- 675- 2150 LDCForFreescaleSemiconductor@hibbertgroup.com
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MRF6V14300HR3 MRF6V14300HSR3
Rev. 10 2, 11/2008 Document Number: MRF6V14300H
RF Device Data Freescale Semiconductor


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